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Forbid disabling SSE on x86 targets that have SSE in their "baseline" #133611
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A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.Area: Enabling/disabling target features like AVX, Neon, etc.C-discussionCategory: Discussion or questions that doesn't represent real issues.Category: Discussion or questions that doesn't represent real issues.O-x86_32Target: x86 processors, 32 bit (like i686-*) (also known as IA-32, i386, i586, i686)Target: x86 processors, 32 bit (like i686-*) (also known as IA-32, i386, i586, i686)O-x86_64Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64)Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64)T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.
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A-target-featureArea: Enabling/disabling target features like AVX, Neon, etc.Area: Enabling/disabling target features like AVX, Neon, etc.C-discussionCategory: Discussion or questions that doesn't represent real issues.Category: Discussion or questions that doesn't represent real issues.O-x86_32Target: x86 processors, 32 bit (like i686-*) (also known as IA-32, i386, i586, i686)Target: x86 processors, 32 bit (like i686-*) (also known as IA-32, i386, i586, i686)O-x86_64Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64)Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64)T-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.
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Passing
-Ctarget-feature=-sseon an x86-64 target currently produces an ugly LLVM error.Doing the same on a x86-32 target leads to unsound floating-point behavior.
Therefore, I think we should deprecate and eventually fully forbid toggling the
sse/sse2target features on x86 targets, except for those targets that do not have these features to begin with (e.g.i586-unknown-linux-gnu).I am implementing some machinery here that could help with that, but properly implementing this will be tricky since one can also use
-Ctarget-cputo disable these target features.Once this is implemented, we have some options for improving the Rust ABI on these targets as well:
PassMode::IndirectHere, compiler team triage decided "Current Tier 1 x86 targets require SSE-based floats at minimum". The concrete proposal above got MCP'd in rust-lang/compiler-team#808.
Open questions
How do we best implement this? It's non trivial since
-Ctarget-cpucan alter thesse/sse2feature gates, so our usual approach of just checking which target features got toggled with-Ctarget-featuredoes not work.To make things worse, the way we control whether
sse/sse2is available in the "basline" is via thebase.cpufield, not via the explicit list of target features, so if we want to do things "only if the baseline has SSE", that's non-trivial to implement. Maybe we should just add aboolfield to the target spec that directly controls "use SSE registers for Rust ABI" or "requires SSE registers" or so?Cc @bjorn3 @workingjubilee @Amanieu